1. Field of the Invention
The present invention relates to wiring formation in the field of a semiconductor device that has a semiconductor element (typically, a transistor) used as a device, and belongs to technical fields on lowering resistance of a wiring and miniaturization thereof.
2. Description of the Related Art
There have recently been developed techniques of manufacturing a TFT with using a thin semiconductor film (a thickness on the order of several hundreds to several thousands nm) formed on an insulating surface. The TFT is widely applied to an integrated circuit (IC) and a semiconductor device such as an electro-optical device, and has been rapidly developed particularly as a switching element of display devices including a liquid crystal display device and a light emitting device.
Above all, the application of display devices such as a monitor and a television has been expanded and mass production of the display devices has proceeded. Therefore, it is required additionally to achieve a large-sized screen, a high definition, a high open area ratio, and a high reliability.
There is, however, voltage drop (also referred to as IR drop) due to a wiring resistance as a phenomenon that becomes a problem in driving a display device, which is a phenomenon that a voltage is more lowered as a distance from a power source is larger in the same wiring. This problem is especially serious in the case of a long wiring length, and is a barrier against the achievement of a large screen of the display device.
Namely, the voltage drop due to the wiring resistance makes it impossible to transmit a desired voltage, which causes as the result a trouble that uniformity of an image quality is significantly damaged in a pixel portion. A contrivance such as applying voltage from both ends of a wiring is attempted to improve such problem. However, the influence of the voltage drop cannot be neglected after all since the wiring is taken around long.
In the case of fabricating a monolithic display device in which a driving circuit portion (typically including a gate driving circuit and a source driving circuit) is formed integrally on the same substrate, a wiring resistance of a wiring taken around between the driving circuit portion and an input terminal for an electric signal becomes a problem. The wiring resistance is likely to cause delay in the electric signal to lower an operation speed of the gate driving circuit or the source driving circuit.
As set forth above, there are troubles that uniformity of an image quality is significantly damaged and an operation speed of the driving circuit portion is extremely lowered by the voltage drop due to the wiring resistance and the delay in the electric signal. Such problem is especially serious in the case of a display device that has a large-sized screen with diagonally several tens inch.
For the above-mentioned problem, it is reported that a material with low resistance is used to lower a wiring resistance (for example, Japanese Patent Laid-Open 2000-58650). In such case, however, microfabrication is difficult and particle contamination is caused in using CMP since copper is used as the material with low resistance and a copper wiring is formed with damascene.
In addition, there is the known technique that a substrate that has an element formed and a printed wiring board (PWB) with a large hardness are electrically connected with a conductor (an isotropic conductive film or bump) to reduce resistance of various wirings (first group of wirings) formed on the substrate that has the element formed in order to suppress an influence of voltage drop due to wiring resistance (for example, Japanese Patent Laid-Open 2001-236025).